High Level Synthesis by using Xilinx Vitis

// Analyze the Xilinx Vitis example

 

// C General include header file

#include <ap_cint.h>

// C typedefs for top-level input and output int / fixed-point formats

// [u]int<precision> (1024 bits) 

typedef int7 in_data_t;

typedef uint7 in_data_t;

// C++ General include header file

// ap_[u]int<W> (1024 bits)
// ap_[u]fixed<W,I,Q,O,N> 

#include <ap_int.h>

#include <ap_fixed.h>

#include <hls_stream.h>

// C++ typedefs for top-level input and output int / fixed-point formats

typedef ap_ufixed<IN_BW,IN_IW> in_data_t;

typedef ap_ufixed<OUT_BW,OUT_IW> out_data_t;

typedef ap_uint<IN_BW> data_t;

typedef ap_int<18> dout1_t;

typedef ap_uint<13> dout2_t;

typedef ap_ufixed<10,8, AP_RND, AP_SAT> din1_t;

typedef ap_fixed<36,30> dout_t;

hls::stream<uint8_t> &bytes_in,

// Support array

typedef ap_int<7> din_t;

typedef ap_int<10> dout_t;

dout_t mem_bottleneck_resolved(din_t mem[N]) {

}